In a conventional semiconductor process, due to differences in structure, PNP transistors have a speed and current feeding ability inferior to those of NPN transistors. Consequently, when a push-pull buffer is formed in this process, usually only NPN transistors are used in the output stage.
FIGS. 9 and 10 show examples of the circuit configuration of push-pull buffers in the prior art. The output stage is comprised only of NPN transistors. More specifically, in the push-pull buffer shown in FIG. 9, NPN transistor Q1 and constant current source I2 comprise a circuit for forming reference base-emitter voltage Vbe1, and the output stage is comprised of push-side NPN transistor Q2 and pull-side NPN transistor Q7. The remaining portion of the buffer forms a control portion that controls pull-side NPN transistor Q7. In the feedback circuit comprised of the control portion, by means of a differential amplifier comprised of PNP transistors Q3, Q4, NPN transistors Q5, Q6, and constant current source I1, the difference between base-emitter voltage VbeQ1 and VbeQ2 of NPN transistors Q1 and Q2 is detected, and a current with a magnitude representing the difference is generated and it flows in Q5. Transistor Q5 converts the magnitude of collector current IcQ5 to collector voltage VcQ5 with a magnitude depending on collector current. Collector voltage VCQ5 becomes the base-emitter voltage VbeQ7 of pull-side Q7 of the output stage, and, by controlling the magnitude of collector current ICQ7 of Q7, a push-pull operation is realized.
For the circuit configuration shown in FIG. 9, the impedance of the collector of transistor Q5 at the terminal of the differential amplifier in the control portion is very high. As a result, transistor Q5 generates collector voltage VCQ5 with a certain gain from collector current ICQ5 that flows in it. This collector voltage VCQ5 becomes base-emitter voltage VbeQ7 of transistor Q7, and an exponential function characteristic exists between the base-emitter voltage and collector current ICQ7 of transistor Q7. Consequently, as collector voltage VCQ5 of transistor Q5 varies, collector current ICQ7 of pull-side transistor Q7 varies significantly, and the dynamic range of the collector current becomes wider. In this way, in the buffer circuit configuration shown in FIG. 9, it is possible to realize a high current driving ability of the buffer. This is an advantage. On the other hand, the collector node of Q3 is connected to the collector of Q5 and the base of Q7. This node has a high impedance, and, due to the presence of the high-impedance node at the base of Q7, combined with the parasitic capacitance between the base-collector of Q3 or the parasitic capacitance between base-collector of Q7 and its mirror effect capacitance, the circuit time constant of the control portion increases. The large circuit time constant generates a peak at low frequency. As a result, the delay in the phase at a high frequency increases, and the stability of the circuit at high frequency decreases. Especially, when a large capacitive load is connected to the output terminal OUT of the push-pull buffer, due to an increase in the phase delay due to the capacitive load and a decrease in the phase margin due to the increase in the phase delay at the collector mode of the Q3, oscillation may take place. In addition, lower stability of the circuit of the buffer becomes a reason for difficulty in increasing the operating speed of the circuit operation. Consequently, the conventional push-pull buffer circuit can hardly be used in applications with a large capacitive load connected.
On the other hand, the push-pull buffer with the circuit configuration shown in FIG. 10 has nearly the same configuration as that shown in FIG. 9. The difference is that the junction portion between the base and collector of Q5 at the terminal of the differential amplifier forms a low-impedance node. Due to this low-impedance node, the base voltage of Q7 becomes lower than that shown in FIG. 9, and it becomes equal to the nearly constant Vbe voltage of Q5. With the circuit configuration of FIG. 10, the low-impedance node in the control portion lowers the time constant of the feedback circuit that forms the control portion. As a result, the stability at high frequency increases, and it is easy to increase the circuit operating speed. This is an advantage. However, for the low-impedance node, the base voltage of Q5 generated from collector current ICQ5 flowing in Q5 decreases, and hence the base voltage of Q7, decreases, and it nearly becomes a constant value without significant variation. In other words, due to the current mirror connection of Q5 and Q7, the current gain between collector current ICQ5 of Q5 and collector current ICQ7 of Q7 is unity. As a result, the dynamic range of collector current ICQ7 of pull-side transistor Q7 becomes equal to the dynamic range of collector current ICQ5 of Q5, and the dynamic range of collector current ICQ5 of Q5 is limited by the variable range of the current flowing to the one branch of the differential amplifier containing it (the range from ½ of I1 to I1). As a result, the current driving ability of the buffer becomes lower, and this is undesired. Concerning the problem of low current driving ability, even with the current mirror connection of Q5 and Q7, and with a mirror current n-fold the collector current of Q5 flowing in Q7, there is still no change in the dynamic range of the collector current of Q7. Consequently, the aforementioned problem cannot be solved.
As explained above, in a conventional push-pull buffer, there is a trade-off relationship between the circuit stability and the current driving ability.
Thus, an object of the present invention is to provide a type of signal transfer circuit appropriate for realizing both high circuit stability and high current driving ability at the same time.
Another object of the present invention is to provide a type of circuit device containing the signal transfer circuit.
Yet another object of the present invention is to provide a type of push-pull buffer or other buffer equipped with the circuit device.
These and other objects of the present invention will be apparent from the following description.